The present disclosure relates to a method of testing semiconductor packages. More specifically, the present disclosure relates to a method of testing semiconductor packages received into insert pockets of a test tray by using a test handler and a tester.
In general, semiconductor devices may be formed on a silicon wafer used as a semiconductor substrate by repeatedly performing a series of manufacturing processes, and the semiconductor devices formed as described above may be formed into semiconductor packages through a dicing process, a bonding process, and a packaging process.
The semiconductor packages may be determined as defective products or non-defective products by an electrical test process. The electrical test process may be performed by a test handler for handling the semiconductor packages and a tester for supplying test signals and analyzing output signals from the semiconductor packages.
In the electrical test process, the semiconductor packages may be received into insert pockets of a test tray, respectively, and then be connected with test sockets of the tester by pusher units. The tester may include an interface board, and the test sockets may be disposed on the interface board. The test handler may include a test chamber in which the electrical test process is performed, and the pusher units may be disposed in the test chamber.
Further, the test handler may include sensors for measuring a temperature in the test chamber and temperature adjusting units for adjusting the temperature. For example, heaters for heating an inside of the test chamber and cooling units for injecting a cooling gas to cool the inside of the test chamber may be disposed in the test chamber, and the temperature in the test chamber may be controlled based on the values measured by the sensors.
However, because heat may be generated in the semiconductor packages while testing the semiconductor packages, and distances of the semiconductor packages from the heaters and the cooling units are different from one another, it is difficult to uniformly maintain the semiconductor packages at a predetermined test temperature.